发明名称 DIGITAL SIGNAL PROCESSING CIRCUIT
摘要 PURPOSE:To perform the debug with high efficiency by reading the internal data when a debug error of the firmware of a digital signal processing circuit is detected. CONSTITUTION:A digital signal processing circuit contains an instruction means 1, an internal memory means 2, an arithmetic means 3, an input/output control means 4 which controls these means 1-3, and an external memory means 5. If the means 4 receives an internal data output signal from outside when a debug error occurs, the means 4 resets an output address generating means 6 to inhibit the input/output with outside. Thus the internal data on the means 2 is outputted to the means 5 via an address designated by the means 6. Thus it is possible to refer to the debug result.
申请公布号 JPS6325741(A) 申请公布日期 1988.02.03
申请号 JP19860169513 申请日期 1986.07.18
申请人 FUJITSU LTD 发明人 KURIHARA HIDEAKI;ITO AKIRA
分类号 G06F11/28;G06F11/22 主分类号 G06F11/28
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