Process for making structures including E2PROM nonvolatile memory cells with self-aligned layers of silicon and associated transistors.

摘要

The process provides for obtaining in the areas intended for the formation of the transistors windows (9, 20, 10) in the intermediate oxide layer (5) between the two silicon layers (4, 11) and, before final etching of the two silicon layers (4, 11) and the intermediate oxide (5), application of a mask formed in such a manner as to superimpose on the second silicon layer (11) in the transistor areas coverings (13, 26, 14) wider than the corresponding windows (9, 20, 10) of the intermediate oxide layer (5). t