发明名称 Integrated scrambler-encoder using PN sequence generator
摘要 Simplified method and apparatus for performing integrated scrambling and encoding or descrambling and decoding of block code digital transmissions is disclosed. The method involves setting the scrambling length equal to an integer multiple of the block length, and then implementing a pseudorandom number sequence generator within the block length counter. The output of the pseudorandom number sequence generator is then logically combined with the incoming data to provide scrambled data, simplifying the complexity of the encoder or decoder significantly.
申请公布号 US4723246(A) 申请公布日期 1988.02.02
申请号 US19850759491 申请日期 1985.07.25
申请人 TANDEM COMPUTERS INCORPORATED 发明人 WELDON, JR., EDWARD J.
分类号 H04L25/03;(IPC1-7):G06F11/10 主分类号 H04L25/03
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