| 摘要 |
A device for calculating a discrete moving window Fourier transform. It comprises an assembly of circuits receiving samples of the input signal (Em+n), the output signal of this assembly ( delta m) being applied to a plurality of N identical and parallel stages (Ek). The assembly of circuits comprises a shift register conferring a delay of N sampling periods on the incident signal and an adder performing the subtraction: delta m=xm+N-Xm of the input and output signals of the shift register. Each of the N stages delivers a signal in the form: xkm+1=Xkm+m delta .ej2 pi k/N.
|
