FET CIRCUITS

摘要

A FET circuit comprising a pair of inverters, each of which comprises an input-stage FET having its gate electrode connected to receive output signals from the FET of the other inverter. The source electrodes of the input-stage FETs are connected to a common-connection point, and current source means are connected between such common-connection point and a power supply terminal. The circuit has an extended allowable range of threshold voltages for the MESFET devices and is effective for stable operation without increased power consumption.