发明名称 CONTROLLING SYSTEM FOR OUTPUT CLIP LEVEL OF SOLID-STATE IMAGE PICKUP DEVICE
摘要 PURPOSE:To minimize a circuit scale without requiring a clip level controlling circuit on the outside, by using a solid state image pickup element of charge transfer type, specifying transfer clock and set clock, and controlling the voltage of an output gate. CONSTITUTION:Electric charge 207 is reset so as to turn a resetting transistor 108 on, and the potential of a floating diffusion layer 103 is set at the same level as that of a drain electrode 101. At the time when the potentials of phiS, 105 and phiS2 106 are in a transition period and the potential of a storage domain of phiS2 106 and the potential of a barrier domain of phiS1 105 reach the same level, the potential difference Q between the potential produced by an output gate 104 and the potential of the storage domain of phiS2 106 is set smaller than the potential difference Q2 between the storage domain and the barrier domain of phiS2 106, and the reset transister 108 is in ON-state. In this condition, the excess charge flowing into the floating diffusion layer 103 is rapidly reset, and white clip operation is performed.
申请公布号 JPS6323353(A) 申请公布日期 1988.01.30
申请号 JP19860168606 申请日期 1986.07.16
申请人 NEC CORP 发明人 YAJI YUKIO
分类号 H01L27/148;H01L21/339;H01L29/762;H01L29/768;H04N5/335;H04N5/341;H04N5/355;H04N5/369;H04N5/372;H04N5/378 主分类号 H01L27/148
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