发明名称 DATA TRANSFER CONTROL SYSTEM
摘要 PURPOSE:To secure the quick and accurate transfer of data even in case a data transfer request other than that of an N-byte boundary is produced, by providing a bus managing circuit which decides the communication between an N-byte converting circuit and a common bus or a bus for input/output device. CONSTITUTION:When data are transferred to a bus 7 for input/output device from a common bus 8, an N-byte converting circuit 1 is initialized and the transfer of data is finished when the bus managing circuit 4 receives an end signal from a processor 10 even though the circuit 1 is not kept under an N-byte boundary state. In the same way, the data stored in the circuit 1 are transferred to the bus 8 to finish the transfer of data when the circuit 4 receives an end signal from the processor 10 even though the circuit 1 is not kept under an N-byte boundary state when data are transferred to the bus 8 from the bus 7.
申请公布号 JPS6316355(A) 申请公布日期 1988.01.23
申请号 JP19860161032 申请日期 1986.07.09
申请人 FUJITSU LTD 发明人 AKITA JUICHI
分类号 G06F13/12;G06F13/40;H04L29/06 主分类号 G06F13/12
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