| 摘要 |
PURPOSE:To improve the yield of TFT and the reliability of interconnection while simplifying the manufacturing process by a method wherein, after forming main electrodes, an insulating layer and a semiconductor layer are patterned. CONSTITUTION:A control electrode 2 is formed on an insulating substrate 1; an insulating layer 3 and a semiconductor layer 4 are successively laminated; main electrodes 5, 6 are formed on the semiconductor layer 4; and after forming the main electrodes 5, 6, the insulating layer 3 and the semiconductor layer 4 are patterned. For example, after forming the gate electrode 2 on the insulating substrate 1, the insulating film 3 is formed of silicon nitride, silicon oxide etc.; the semiconductor layer 4 is formed of polycrystalline silicon, amorphous silicon etc.; and an impurity semiconductor layer 7 doped with phosphorus etc. are successively lamination-formed. Next, a conductive layer for electrodes is deposited and then this conductive layer and the impurity semiconductor layer 7 are patterned to form the source electrode 5 and the drain electrode 6. Finally, the insulating layer 3 and the semiconductor layer 4 are simultaneously patterned on the same pattern to form a TFT. |
