Semiconductor A/D converter using charge coupled device

摘要

An A/D converter has a transfer channel and a plurality of transfer electrodes for transferring a charge from the transfer channel in a predetermined direction. When the number of bits of the digital signal to be generated is n, the number of charge transfer stages is 2n. A ratio of the area of the last electrode of a given odd-numbered stage to that of the last electrode of the immediately preceding odd-numbered stage is 1:2. Each even-numbered transfer stage has a first transfer path for transferring a charge exceeding 1/2 of the channel potential of the last electrode of the immediately preceding stage and a second transfer path for transferring a charge which does not exceed 1/2 of the channel potential. The charge transferred to the first transfer path is detected. Transfer of the charge on the second transfer path to the next stage or sweeping thereof outside the charge transfer section is switched in accordance with the transfer charge detection signal. A charge detected by the mth (m is the even number) transfer stage is delayed by a delay network by (n+1-m/2) bits, thereby generating a digital signal.