发明名称 Multiplying interface circuit for level shifting between FET and TTL levels
摘要 An interface circuit for use as a circuit interface between bipolar ECL logic circuits and field effect transistor circuits. The interface circuit includes an amplifier circuit having an enhancement level shifting and enhancement multiplier device wherein sensitivity to device threshold variations are essentially eliminated. The level shifting portion of the amplifier comprises a load device plus an enhancement type input field effect transistor having a common drain and gate and with its source connected to the incoming ECL level. In dual rail operation, the load device has its gate modulated by the complement of the incoming signal. The output of this stage is the ECL signal shifted upwards by slightly more than the enhancement threshold voltage, making it possible to drive the next multiplier stage without use of any depletion implant. The level shifted signal is applied to the gate of another enhancement device in the multiplier stage, with the complement ECL signal applied to the second enhancement device source electrode. The ECL signal is also used to drive the gate of another load device in the multiplier stage. A drive stage may be added to the combination of the level shifter and multiplier to provide a full output voltage level.
申请公布号 US4719372(A) 申请公布日期 1988.01.12
申请号 US19860825420 申请日期 1986.02.03
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 CHAPPELL, BARBARA A.;SCHUSTER, STANLEY E.
分类号 H03K19/0185;(IPC1-7):H03K17/16;H03K19/092;H03K19/094;H03L5/00 主分类号 H03K19/0185
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