发明名称 MULTIPROCESSOR SYSTEM
摘要 PURPOSE:To lighten the competition relating to the use of a system bus and to improve a processing speed by transferring a program required for respective processors to an individual instruction storing memory from a common memory, fetching this instruction and processing. CONSTITUTION:At the time of the rise of a system, one of the processors PU21-2n reads the load instruction of the program from a ROM6 through the system bus 1. The PU21 loads the program in a magnetic disk 10 via a disk controller 7 and the program from a communication line 12 via a controller 9 in the common memory 3. At the time of the completion of this load, the program required for the processing assigned to itself is transferred to the instruction storing memory 41 from the memory 3. After the completion of the transfer, according to the instruction fetched from the memory 41 and by using a data area in the memory 3, the processing assigned to itself is performed. The PU22-2n similarly carries out the processing. Accordingly, the respective PUs make access to the memory 3 through the bus 1 only at the time of the access of the data.
申请公布号 JPS635461(A) 申请公布日期 1988.01.11
申请号 JP19860149230 申请日期 1986.06.25
申请人 NEC CORP;NIPPON TELEGR & TELEPH CORP <NTT> 发明人 SUGAWARA TSUGIO;INOI SATORU
分类号 G06F9/445;G06F15/177 主分类号 G06F9/445
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