| 摘要 |
PURPOSE:To enhance integration by a method wherein a trench is formed between two lateral channel regions, channel regions are formed on the sides of the trench, and a P-channel MOS transistor and N-channel MOS transistor are respectively provided with a plurality of channel regions. CONSTITUTION:Two lateral channels regions 2 and 4 are formed on a semiconductor substrate 1 and a trench 6 is provided between the two lateral channel regions 2 and 4, and channel regions 7 and 8 are formed on the sides of the trench 6, for a P-channel MOS transistor 3 and N-channel MOS transistor 5 to be provided respectively with a plurality of channel regions. In this way, a device of a certain current capacity may be constructed occupying an area smaller than in a conventional design, or a device of an enhanced current capacity may be constructed occupying the same area as in a conventional design, which enables integration to be enhanced. |
