| 摘要 |
PURPOSE:To get rid of a DC potential variation occurring before and after a feedback point, so that a dynamic range is not deteriorated, by driving the first stage capacitor of plural charge transfer elements which have been provided in parallel, by the same clock signal. CONSTITUTION:Between a diode 24 and a transistor TR25 are connected the hot- end side of a capacitor 27 and TR28, and between base and collector of the TR28 is connected a capacitor 29. The cold-end side of the capacitor 27 is connected to a signal terminal 6 of a clock generating circuit 8, and the base the TR28 is connected to the same terminal 7. That is to say, in this circuit, a BBD constituting a DC correcting circuit is amplified by one stage, and a clock signal to be provided to the first stage capacitor 27 is made to coincide with a clock signal phi1 to be provided to the first stage capacitor C0 of the BBD. Accordingly, each Dc potential of BBD coincides entirely, and a DC potential variation before and after a feedback point, namely, between taps T1, T2 does not occur at all. |
