发明名称 FRAME SYNCHRONIZING SYSTEM
摘要 <p>PURPOSE:To quickly restore a synchronized state when a pseudo synchronizing state is set, by counting synchronization error pulses and forcibly clearing a synchronization protecting circuit when the pulses are counted more than the prescribed number of times within a fixed time. CONSTITUTION:Frame synchronizing error pulses in a pseudo synchronizing state are inputted to a synchronization protecting circuit 10 and counting means 12. When the count value of the synchronizing error pulses of the counting means 12 exceeds a set value in a prescribed time fixed by a timer 14, a signal is outputted to a synchronization protecting circuit clearing means 16 to forcibly clear the circuit 10 so as to set a hunting state again and a synchronizing state is restored. Since the circuit 10 has a prescribed number of protecting stages, the re-hunting state is not set unless the synchronization error pulses are continuously inputted for the prescribed number of times and a state where the pseudo synchronizing state is continued for a long time may be occurred. In order to prevent the occurrence of such state, the re-hunting state is forcibly set by means of the above-mentioned circuits so that the synchronizing-state can be quickly restored.</p>
申请公布号 JPS632436(A) 申请公布日期 1988.01.07
申请号 JP19860145883 申请日期 1986.06.20
申请人 FUJITSU LTD 发明人 HONGO YOSHIYUKI
分类号 H04L7/08;H04J3/06 主分类号 H04L7/08
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