发明名称 INTEGRATED SEMICONDUCTOR CIRCUIT HAVING AN ALUMINIUM OR ALUMINIUM ALLOY MULTILAYER WIRING, AND METHOD FOR ITS MANUFACTURE
摘要 <p>1. A process for the production of an integrated a semiconductor circuit having contact conductor paths (2, 3) consisting of aluminium or an aluminium alloy and arranged in at least two planes (multi-layer wiring), which are separated by insulating layers (4) and which are electrically connected to one another by way of contact holes (5) (via holes) introduced into the insulating layers (4), characterized in that a) after the etching of the contact holes (5) into the first insulating layer (4) which covers the first conductor path plane (2), a non-aluminium metal (6), whose thickness is equal to that of the frist insulating layer (4), is applied in the contact holes (5) by selective deposition from the gas phase, b) that the aluminium or aluminium-alloy layer which forms the second conductor path plane is then deposited onto the entire surface, and c) the second conductor path plane (3) is structured using a wet-chemical etching process to which the non-aluminium metal (6) is largely resistant.</p>
申请公布号 EP0134571(B1) 申请公布日期 1988.01.07
申请号 EP19840110189 申请日期 1984.08.27
申请人 SIEMENS AKTIENGESELLSCHAFT BERLIN UND MUNCHEN 发明人 NEPPL, FRANZ, DR. RER. NAT.;SCHWABE, ULRICH, DR.
分类号 H01L21/768;H01L23/522;H01L23/532;(IPC1-7):H01L23/52;H01L21/90 主分类号 H01L21/768
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