| 摘要 |
PURPOSE:To obtain an interpolation enlargement arithmetic circuit for executing at high speed an interpolation enlargement processing of the whole screen, by inputting successively a necessary data to a register at the time of executing the interpolation enlargement processing, and providing a group of plural pieces of data to an interpolation enlarging circuit by one clock. CONSTITUTION:At least one piece of image data of image information constituted of (m)X(n) picture elements is provided successively to an input terminal IN, and a line buffer 1 shifts its data successively. Subsequently, a data which is to be brought to an interpolation enlargement by an interpolation enlarging circuit 2, for instance, a data of (k)X(l) picture elements of a specific range in the (m)X(n) picture elements is outputted in parallel. Its output data is provided to the interpolation enlargement arithmetic circuit 2, and an interpolation enlargement data is generated and outputted. Its interpolation enlargement data to be outputted is a data for constituting the image information constituted of MXN picture elements, and an image data by a specific range unit is provided successively, therefore, a pipeline processing can be executed. |
