| 摘要 |
PURPOSE:To increase a data processing speed by providing an inversion instructing bit for instructing a fact that all bits of a data designated by a source operand of a processing instruction are inverted between '0' and '1', on said instruction, and inverting and processing the data by an instruction of this inversion instructing bit. CONSTITUTION:By an inversion instructing bit P provided on an instruction M, a data designated by a source operand of this instruction, for instance, a pattern to be tested is inverted by an inversion circuit 1, therefore, a prescribed instruction becomes unnecessary. Also, by a hardware, this inversion is executed, therefore, with regard to a cycle of a lock required for its processing, as well, one cycle is enough. In case of using an instruction which can designate two operands, when the inversion instructing bit is provided in advance with regard to the respective operands, as for an instruction for executing a processing, one is enough, and not only one register is enough but also the processing can be ended by one clock. |
