| 摘要 |
A protective circuit for a sequentially selecting circuit which selects a series of circuit element electrodes one by one with signals which are generated by a shift register. The invention includes a counter for generating a count output corresponding to the total number of selections made. An input pulse of the shift register is formed according to the output from the counter and the timing pulse and the counter is reset according to the timing pulse and a clock pulse of the selection. With such arrangement when the timing pulse is not generated, the counter will not operate and an effective input pulse to the shift register will not be generated and therefore the shift register will not sequentially read erroneous inputs and a plurality of shift stage outputs will not be generated at the same time. In this manner, the selected circuits, elements, electrodes and drive circuit of power supply will be prevented from being damaged.
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