| 摘要 |
PURPOSE:To reduce a gate resistance and a flinging capacitance between a gate and a source by employing a multilayer resist structure. CONSTITUTION:An organic or inorganic insulating layer 2, 1st resist layer 3, an intermediate layer 4 made of metal such as silicon oxide and 2nd resist layer 5 are successively formed on a semiconductor substrate 1. Etching is performed with a pattern formed by exposing and developing the 2nd resist layer 5 to form a predetermined pattern in the intermediate layer 4 and, further, an aperture is formed in the 1st resist layer 3 to expose the organic or inorganic insulating layer 2 and the semiconductor substrate 1 surface. Then the semicon ductor substrate 1 surface is etched or subjected to a surface treatment and coated with 3rd resist layer 6 and one side of the part above the 1st resist layer 3 is removed and, at the same time, an electrode metal layer 7 is formed on the exposed semiconductor substrate 1, the organic or inorganic insulating layer 2 and the intermediate layer 4 by a coating method with orientation applied from the above. Further, the unnecessary part of the electrode metal layer 7, intermediate layer 4, 1st resist layer 3 and organic or inorganic insulat ing layer 2 are removed.
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