| 摘要 |
<p>PURPOSE:To reduce the space shared by a memory cell by a method wherein a capacitor is formed in a groove part provided in the surface of a semiconductor substrate; the upper part of groove part and a part of substrate are covered with an oxide film and a polycrystalline silicon to single crystallize them; and the lower part of source region and the upper part of diffused layer region are connected to each other. CONSTITUTION:A high concentration P type bottom surface 3 and an N type diffused sidewall 4 are provided in a groove part 2 formed in a P type silicon substrate 1 and then the sidewall is covered with an oxide film 5. Furthermore, the groove part 2 leaving a bit of upper part thereof is filled with P type polycrystalline silicon 6 to form a capacitor by the sidewall 4, polycrystalline silicon 6 and sidewall oxide film 5. The upper part of groove part 2 and a part of upper part of substrate 1 leaving a part of upper part of N type sidewall 5 is covered with an oxide film 7 and after depositing P type polycrystalline silicon, a P type single crystal silicon 8 is formed by laser annealing process etc. Finally, the P type single crystal silicon is partly diffused to form an N type source 9 and a drain 10; a gate electrode 11 is provided to form an MOS transistor; and the source 9 is brought into contact with the sidewall 5.</p> |
