发明名称 MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To decrease defects such as dislocation defects due to etching when a gate electrode is formed, by forming at least one of source or drain regions, thereafter forming a buffer film on the surface thereof, and then forming the gate electrode. CONSTITUTION:A buffer film 8 comprising a silicon oxide film is formed on an n<+> source region 7 on the side of a capacitor element of a selective MISFET when data is read. Then damages are not yielded in the n<+> source region 7 due to plasma etching for forming a conductor plate 12, plasma etching for forming a gate electrode 16 and ion implantation for forming an n<+> drain region 18. Defects such as dislocation defects are not yielded. Thus the leaking of electric charge as data stored in the capacitor element from the n+ source region 7 can be prevented.
申请公布号 JPS62298154(A) 申请公布日期 1987.12.25
申请号 JP19860140056 申请日期 1986.06.18
申请人 HITACHI LTD 发明人 KAJITANI KAZUHIKO
分类号 H01L29/78;G11C11/403;H01L27/108 主分类号 H01L29/78
代理机构 代理人
主权项
地址