发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To use two kinds of transistors in the same integrated circuit separately, by constituting two kinds of vertical type n-p-n transistors having different depths of collector and base junctions together with complementary MOS transistors. CONSTITUTION:On a p-type semiconductor substrate 101, n-type regions 103, 104 and 105, which are insulated and isolated with a p-type region 102, are formed. Then, a p-type well region 106 of an n-channel MOS transistor (Tr) 121 end a base region 107 of a high withstanding voltage n-p-n Tr 123 are simultaneously formed. After a gate oxide film 108 of a CMOS Tr is grown, a base region 109 of the first kind of a high performance n-p-n Tr is formed. Thereafter source and drain regions and the like are formed. Together with the complementary MOS Trs 120 and 121, a high performance n-p-n Tr 122 having a shallow collector-base junction and the high breakdown strength n-p-n Tr 123 having a deep collector-base junction are formed.
申请公布号 JPS62298147(A) 申请公布日期 1987.12.25
申请号 JP19860142355 申请日期 1986.06.17
申请人 NEC CORP 发明人 NAKASHIBA HIROSHI
分类号 H01L21/8249;H01L27/06 主分类号 H01L21/8249
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