发明名称 INPUT TERMINAL CIRCUIT
摘要 PURPOSE:To obtain a multi-valued logic output by providing at least two resistors dividing a voltage fed to its input terminal and a logic gate circuit receiving each divided voltage. CONSTITUTION:The titled input terminal circuit 1 consists of an input terminal 2, resistors R1, R2 and R3 dividing a voltage fed to the terminal 2 and logic gate circuits G1, G2 and G3. A logical '1' or '0' is outputted from output points P4, P5 and P6 depending whether the voltage at the input points P1, P2 and P3 of the circuits G1, G2 and G3 is larger than the threshold voltage of the logic gate circuits. Thus, a 4-valued logic output is obtained from the voltage applied to the terminal 2.
申请公布号 JPS62296620(A) 申请公布日期 1987.12.23
申请号 JP19860140559 申请日期 1986.06.16
申请人 NEC CORP 发明人 HONDA KAZUO
分类号 H03K19/20 主分类号 H03K19/20
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