| 摘要 |
PURPOSE:To reduce parasitic capacity by a method wherein a shallow groove is provided adjacent to a first and second deep grooves and the shallow groove is filled with an insulating material for the establishment of insulation and isolation. CONSTITUTION:Prescribed depths are removed from prescribed regions in a semiconductor substrate 30 for the formation of a first and second deep grooves 37 and 38. A shallow groove 40 is provided between the first and second deep grooves 37 and 38, adjacent to them. The first and second deep grooves 37 and 38 and shallow groove 40 are filled with insulating materials 43 and 46-48. In this way,, the HF etching rate is prevented from acceleration on the insulator surface after a flattening process because there is no thick insulating layer. With two deep isolating regions in existence between the collectors of two neighboring transistors, the voltage-withstanding feature between the two collectors may be improved without an increase in isolation depth.
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