| 摘要 |
PURPOSE:To test memory elements comprising a single package without being affected by an integrated circuit for controlling data by providing a bypass circuit between the peripheral circuit of a dynamic MOSRAM array and a bus control circuit. CONSTITUTION:As for data, a transmission gate 50 in a data exchange circuit 5 and an output gate 64 in the data control integrated circuit 6 are set disable at the time of testing. A two-way data signal route consisting of the bypass circuit 8, the MOS memory peripheral circuit 7 and the MOSRAM array 9 is built in such a way. As a result, data can be set to the MOSRAM array 9 and taken out of said array 9 without the data control integrated circuit 6 in mind. The width of a data signal on a bus may be different from the width of a signal in the MOSRAM array 9. In that case, bus control circuits and bypass circuits as many as are found short of should be added.
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