发明名称 CONTROL SYSTEM FOR STRUCTURE OF DATA PROCESSING SYSTEM
摘要 PURPOSE:To maintain a system so as not to introduce break down in the tilled system capable of dynamically switching a couple (C) mode and a separate (S) mode by permitting a SVP to hold and control information on failure of each device and exchanging information controlled as separate systems so as to process in a lump when the operation shifts from the S mode to the C mode. CONSTITUTION:If a CPU 10 develops failure, it instantaneously stops operations under execution, and notifies the service processor SVP 16 of the failure. After the SVP 16 logs out the inner state of the CPU 10, it judges whether a retrial is possible or not. If so, the inner state of the CPU 10 is restored to the state of beginning the retrial, and the retrial is activated. If it proves successful, operations continue. If it fails, the CPU 10 is isolated from the system, and tasks that the CPU 10 is executing are shifted to a CPU 11, and a simular retrial is executed. If the troubled part in the CPU 10 can be separated, like a cache memory, a partial separation is made, and a retrial is conducted. In that case the retrial proves successful.
申请公布号 JPS62296264(A) 申请公布日期 1987.12.23
申请号 JP19860140530 申请日期 1986.06.16
申请人 NEC CORP 发明人 INOUE MASANOBU
分类号 G06F15/16;G06F11/16;G06F15/177 主分类号 G06F15/16
代理机构 代理人
主权项
地址