| 摘要 |
PURPOSE:To realize both a high current amplification factor and a high collector dielectric strength by an arrangement wherein a gate electrode overlaps a first diffused layer but is in off-set relation to a second diffused layer and a surface inversion layer is formed in the surface of a well directly under the gate electrode when the gate electrode is given a potential. CONSTITUTION:A P-type well 2 is formed in an N-type semiconductor substrate 1 and a gate electrode 4 is provided on a gate insulating layer 3 formed in the surface of the well 2 and a diffused layer 5 composed of N-type or N<+>type diffused layers 1A and 1B and a diffused layer 6 are formed near both the ends of the gate electrode 4. The gate electrode 4 overlaps the diffused layer 5 at the part of the diffused layer 1a but is in off-set relation to the diffused layer 6. When this transistor is operated, the gate electrode 4 is higher in potential than the P-type well 2 and a surface inversion layer 7 stretching to the diffused layer 1A is formed in the surface of the P-type well 2 directly under th gate electrode 4 and the width of the off-set between the edge of the gate electrode 4 and the 2nd diffused layer 6 is the width Wb of a base. In this device, the P-type well 2 serves as a base, the diffused layer 5 and the inversion layer 7 serve jointly as a collector and the diffused layer 6 serves as an emitter. |
