| 摘要 |
PURPOSE:To decrease the number of memories for adjusting the number of stages of a pipeline, by shifting successively a write pulse and writing it in the memory. CONSTITUTION:The processor is constituted of a first pipeline for executing a pre-processing 3 and the first feature extraction processings (b)-(c), the second pipeline for executing the pre-processing 3 and the second feature extraction processing (e), and a processing force for executing a identification processing by using the result of first and the second feature extraction processings. As for each processing of the first pipeline, read-out and write are executed simultaneously, therefore, two memories are provided, respectively. Also, the second pipeline is constituted of one memory 6 for storing a result of the processing (e), one memory 6' for receiving a transfer of a data of the memory 6, and memories 6''A, 6''B for receiving a transfer of a data of the memory 6'. In the memories 6, 6', the data of a memory 2A or 2B of the pre-stage, and the memory 6 are written by a write pulse which is generated after the data of the memories concerned are written in the memories 6', 6'' or 6''B of the next stage.
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