发明名称 DATA TRANSFER SYSTEM
摘要 PURPOSE:To transfer data between internal and external input/output devices just with one instruction by arranging the internal input/output device in an input/output address space and an internal memory and the external input/output device in a memory address space respectively. CONSTITUTION:When a CPU 1 outputs an IORD signal, an address decoder part 6 activates a CS for an internal input/output device 3 since the device 3 is set at a prescribed input/output address by the part 6. Thus data are read out of the device 3. Then the CPU 1 outputs a MEWR signal to an interface 4 and then a prescribed address signal to a memory address decoder 7 via signal lines A14 and 15 respectively. An internal memory 2 and an external input/output device 5 are set at each prescribed memory address by the decoder 7. Therefore, the decoder 7 activates a SEL of an interface 4 when a prescribed address signal is supplied for selection of the device 5. Thus data are written into the device 5 from the device 3 via the interface 4.
申请公布号 JPS62293365(A) 申请公布日期 1987.12.19
申请号 JP19860133896 申请日期 1986.06.11
申请人 HITACHI LTD;HITACHI VIDEO ENG CO LTD 发明人 ITO TAMOTSU;MASUBUCHI SHINICHI;MATSUNAGA TOSHIHIRO
分类号 G06F13/14;G06F13/38 主分类号 G06F13/14
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