发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To easily confirm the state of fusing of two pieces of polycrystalline silicon.fuses by connecting transistors in parallel respectively to the two polycrystalline silicon.fuses in a defective memory cell address generating circuit, and conducting these transistors as necessary. CONSTITUTION:A memory cell array having a redundancy memory cell is provided. Also, the defective memory cell address generating circuit in which the two polycrystalline silicon.fuses F1 and F2 along with the transistors Q1 and Q2 are connected in parallel respectively with the fuses FF1 and F2 correspond to one digit of an address, is provided. In case of excuting a program in which the redundancy function is employed, whether the two fuses F1 and F2 are both completely fused off or not, and which one is fused off when either of the fuses F1 and F2 is fused off, can be confirmed easily and simply only by conducting the transistors Q1 and Q2 in the parallel connection.
申请公布号 JPS62291799(A) 申请公布日期 1987.12.18
申请号 JP19860133782 申请日期 1986.06.11
申请人 FUJITSU LTD 发明人 AKAOGI TAKAO;KAWASHIMA HIROMI
分类号 G11C17/16;G11C17/18;G11C29/00;G11C29/04 主分类号 G11C17/16
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