发明名称 FABRICATION METHOD FOR INTEGRATED CIRCUIT STRUCTURES INCLUDING FIELD EFFECT TRANSISTORS OF SUB-MICROMETER GATE LENGTH, AND INTEGRATED CIRCUIT STRUCTURE FABRICATED BY THIS METHOD
摘要 For forming field effect transistors, a multilayer structure (16, 20, 21, 22, 24, 26) of different materials including a conductive layer (20) is deposited over a substrate (10). Vertical sidewalls are obtained by etching the top layers (24, 26) and a sidewall layer (30) is formed by oxidizing the sidewalls. Removing further material leaves the very fine structure of sidewall layers, which is used as a mask to etch the lower layers (22, 21, 20) so as to leave portions of the conductive layer as very fine gate electrodes, plus interconnections. Some gate electrodes of larger dimension are obtained simultaneously by covering the area between two stripes of the sidewall layer before etching down to the conductive layer.
申请公布号 DE3277664(D1) 申请公布日期 1987.12.17
申请号 DE19823277664 申请日期 1982.12.27
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 DE LA MONEDA, FRANCISCO HOMERO;DOCKERTY, ROBERT CHARLES
分类号 H01L21/28;H01L21/316;H01L21/762;H01L21/8234;H01L21/8246;H01L27/088;H01L27/112;H01L29/78;(IPC1-7):H01L21/82;H01L21/76;H01L27/08 主分类号 H01L21/28
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