| 摘要 |
The addition-subtraction unit according to the subject of the invention stores the carry at every addition, and processes it at the next addition. Similarly, at every subtraction the carry is stored and processed at the next subtraction. Subtraction is done additively, by processing the nine's complement of the subtrahend instead of the latter. As its main circuit, this addition-subtraction unit has an adder circuit 1, which consists of 28 individual adder circuits 20. Eight individual adder circuits 20 are saved by circuits 11 and 12. Circuit 3 is a nine's complement circuit, and circuit 10 is a one upwards shift circuit. <IMAGE>
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