发明名称 LOAD CONTROLLER
摘要 PURPOSE:To completely prevent the malfunction of a logic control circuit by using a simultaneous operation inhibiting circuit, a malfunction preventing circuit and a gate circuit to form an interface circuit. CONSTITUTION:In an interface circuit 54, a simultaneous operation inhibiting circuit 55 which receives the operating signals from operating switches 48-52 has five output lines L1-L5 corresponding in 1:1 to the switches 48-52 respectively. Then the circuit 55 delivers the operating signal only to an output line corresponding to the operating switch operated first among those switches 48-52. A malfunction preventing circuit 56 which prevents the malfunctions due to the chattering of switches 48-52 and external noises is connected with an OR circuit 57, a 4-bit shift register 58, an inverter 59 and an AND circuit 60. A gate circuit 62 transmits the operating signals received from output lines L1-L5 only in an output mode of a permission signal Sp and applies those signals to an input port P1 of a logic control circuit 53 through output terminals of AND circuits 63-67.
申请公布号 JPS62290914(A) 申请公布日期 1987.12.17
申请号 JP19860134263 申请日期 1986.06.10
申请人 TOSHIBA CORP 发明人 MATSUO KATSUHARU
分类号 G05B9/02;G05D9/02 主分类号 G05B9/02
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