Logic analyzer

摘要

A logic analyzer including at least a sampling system for sampling input data with a sampling clock signal comprises a condition decision circuit having inputs supplied with the input data and an internal clock signal for producing a conditioning signal in dependence on the input data in synchronism with the internal clock signal, a clock detection circuit for deciding whether the sampling clock signal makes appearance within a predetermined period of the internal clock signal to produce a signal representative of the result of the decision, and a control circuit having inputs supplied with the conditioning signal and the signal representative of said result for producing a trigger signal corresponding to the conditioning signal in dependence on the signal representative of the result of decision.