摘要 |
<p>PURPOSE:To decrease the number of masks, by etching a semiconductor layer and an insulating layer in the same pattern, forming a pattern, which is isolated with the double layers of the semiconductor layer and the insulating layer, using a part where the double layers do not remain, and providing a connecting part with a display electrode and a lead-out part for a gate electrode bus. CONSTITUTION:ITO and Cr on a glass substrate 10 are etched so that a picture element shape comprising a transparent gate electrodes 11b and Cr 12 remains. Patterns of the Cr electrodes 12a and 12b are formed. An SiNx layer 13 as an insulating film and an aSi layer 14 as a semiconductor layer sector are formed by a plasma CVD method. Etching is performed, and an aSi island region, which is to become a gate insulating layer and a channel region, is formed. Al is deposited by a DC sputtering method. Al is etched by using a third mask so that an Al source electrode 15a and an Al drain electrode 15b are made to remain in the pattern. The ITOs 11a and 11b are formed beneath 12a and 12b, and the gate insulating film 13 is formed beneath the aSi 14 in the same pattern. Thus the number of the masks can be reduced.</p> |