| 摘要 |
<p>PURPOSE:To output a clock pulse suited to the working speed of the corresponding subsystem by switching the outputs of plural dividing circuits which output clock pulses via a switch circuit. CONSTITUTION:An oscillation circuit 1 outputs the prescribed clock pulses to dividing circuits 2 and 3. The circuit 2 divides the clock pulse of the circuit 1 for a period between the rise and the fall of the control signal Vco received from a detecting circuit 5. Then the circuit 2 outputs a clock pulse V1 of a low frequency. While the circuit 3 divides the clock pulse of the circuit 1 for a period between the rise and the fall of the inverse control signal Vco received from the circuit 5 and outputs a clock pulse V2 of a high frequency. A switch circuit 4 switches the clock pulses V1 and V2 of circuits 2 and 3 by the control pulse Vco and the inverse of Vco and outputs them as clock pulsed Vck.</p> |
