| 摘要 |
PURPOSE:To widen a shift width and to easily change the shift width by using a counter having an automatic initial value resetting means for address generation. CONSTITUTION:The initial value of a counter is increased sequentially in the counter 1 by using a clock signal 12 and if count-overflow is caused, a carrier signal 13 is connected to a carrier signal input of the counter 1, which is reset to the initial value automatically. The output of the counter 1 is connected to an address input of a memory 3 functioning as a RAM via an address bus 14. The output of the count means 1 is used as an address and reading/writing is applied at the memory means 3 by using the same address. The data from the memory means is latched by a latch means 5 at the time of reading. The latched data is shifted by one bit to a high order by the 1st gate means at write and written in the memory means 3. Further, the inputted serial data is written on the lower order of the address at that time in the memory means 3 by the 2nd gate means 8. Thus, the shift width is widened and the shift width is changed easily. |
