发明名称 |
LOGICAL SIMULATION PROCESSOR |
摘要 |
PURPOSE:To perform logical simulation at a high speed by using a clock advance means which processes plural clock signals (i) in the form of signal value 'Ci'. CONSTITUTION:A storage device 5 contains a program storing area 51 and a data storing area 52. The area 51 stores a program which controls the logical simulation of this logic simulation processor. While the area 52 stores a table group that translates a logic circuit to the simulated into a form which can undergo the logical simulation and another table group that is used to hold the advance state of the clock signal or advances the clock signal. A logical simulation-only computing element 32 provided in an arithmetic processing part 3 supplies data received from a register group 4 by a command of an instruction control part 1 to calculate the output signal value and sends the result of this calculation to the group 4 again. |
申请公布号 |
JPS62285143(A) |
申请公布日期 |
1987.12.11 |
申请号 |
JP19860127924 |
申请日期 |
1986.06.04 |
申请人 |
HITACHI LTD |
发明人 |
TAKAMINE YOSHIO;MIYAMOTO SHUNSUKE;OMODA KOICHIRO |
分类号 |
G06F11/25;G06F11/26;G06F17/50;G06F19/00 |
主分类号 |
G06F11/25 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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