发明名称 COMMUNICATION CONTROL EQUIPMENT
摘要 PURPOSE:To perform protocol processing and managing a buffer queue accompa nying the acquisition and returning of a buffer simultaneously by providing a means which stores control information on the buffer stored with event infor mation temporarily and a CPU which manages the update of the buffer queue integrally. CONSTITUTION:If the buffer needs to be acquired during the protocol processing of a CPU 2, control information QCB of the buffer queue to which a buffer acquisition instruction is sent by a CPU 1 is stored and a necessary queue storage means 3 is referred to, thereby obtaining the buffer. The the CPU 2 writes necessary event information in a buffer area referred to based on the QCB passed from the CPU 1 as QCB reference information and the execution of a protocol processing routine of another layer is started. Further, the buffer becomes unnecessary after the protocol processing is returned to the CPU 1 by writing only the queue number in the QCB in the necessary queue storage means 3 and the CPU 1 generates a buffer acquisition instruction by using the QCB as a new necessary queue.
申请公布号 JPS62284547(A) 申请公布日期 1987.12.10
申请号 JP19860125874 申请日期 1986.06.02
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 NAKAJIMA MARIKO;HORIE YASUO
分类号 G06F13/00;G06F12/02;H04L13/00;H04L29/02 主分类号 G06F13/00
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