| 摘要 |
PURPOSE:To execute continuously a succeeding scalar instruction by providing the second mask register to store temporarily mask information and the first mask register linked fixedly to the output of the second mask register and to supply the mask information in accordance with the vector instruction, corresponding to a computing element. CONSTITUTION:The second mask registers 202 and 402, the first mask registers 201 and 401, mask bit selecting circuits 205 and 405, mask bit synchronizing circuits 233 and 403 and mask control circuits 206 and 406 are respectively provided corresponding to computing elements 103 and 303. Consequently, the operation with two different masks of mask information can be simultaneously processed. While the operation with the mask is processed by the first vector registers 201 and 401, the next mask information can be stored into the second vector registers 201 and 401. |
