| 摘要 |
This adder comprising 2<p>-1 inputs each receiving one bit, where p is an integer and p>/=2, and delivering a p-bit binary number equal to the sum of the binary figures received at the input, is characterised in that it comprises 2<p>-1 electric charge generators 41, 42, ... 415 each linked to one input of the adder and each comprising a capacitor 10 with capacitance C, each electric charge generator creating, at the terminals of the capacitor, an electric charge proportional to the value of the bit D1, D2, ... D15 received at the input; an analog summer 6 for producing a quantity of electric charges equal to the sum of the said electric charges contained in each capacitor; and a binary coder 8 for producing the said p-bit number as a function of the quantity of electric charges produced by the analog summer. The invention also relates to a multiplier comprising at least one such 2<p>-1 bit adder of the same rank of the matrix of the partial products Ai-Bj, of two binary numbers A and B to be multiplied. <IMAGE>
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