发明名称 LOGIC CIRCUIT FOR FACILITATING DIAGNOSIS
摘要 PURPOSE:To curtail the number of pins required for diagnosing logic, by observing a direct output data of a logic portion to be diagnosed from the existing scan-out data pin. CONSTITUTION:A scan mode signal is sent from a signal line 18 to specify a memory element 9 with a scan address signal line 21 and a scan clock signal is sent out from a signal line 20 to latch 9 a scan-in data of a signal line 19. Now, an output data signal line 22 of the element 9 is established and a signal is sent out from a signal line 23 of an AND gate 10 to select a direct output signal line 16 for a logic portion 8 to be diagnosed not containing a memory element. Then, a memory element 13 is specified by a scan address signal line 26 and a clock signal is sent out from a signal line 25 to latch a direct output data for the portion 8 from a signal line 24 of a selector 11. Consequently, a signal line 17 of the element 13 is established and the direct output data for the portion 8 is inputted into the existing scan-out data pin 29 of a higher- order logic 1 from a signal line 28 of an AND gate 14 to enable the observation of the data.
申请公布号 JPS62278472(A) 申请公布日期 1987.12.03
申请号 JP19860121013 申请日期 1986.05.28
申请人 HITACHI LTD 发明人 KAWACHI SACHIKO;NISHIDA TAKAO
分类号 G01R31/28;G06F11/22 主分类号 G01R31/28
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