| 摘要 |
PURPOSE:To hold the interruptions within an instruction processing period by securing such a constitution where a control circuit outputs a group of timing signals and intermits the instruction executing process after detecting an input signal requesting an interruption to subtract the value of a program counter by an amount equivalent to the count value of an instruction length counting means. CONSTITUTION:A control circuit 107 outputs the address information stored in a PC103 for read-out processing of an instruction code when the processing is through with the preceding instruction code and then writes the instruction code of the corresponding address to an IR106 via a data bus 102. In this case, the address of the PC103 is added to an adder 5 and written again to the PC103 as soon as it is read out. At the same time, a counter 117 counts up every time the adder 105 adds the address of the PC103. Then the circuit 107 produces successively a group of timing signals needed for instruction processing in response to the instruction code of the IR106. At the same time, the circuit 107 activate an interruption request sample signal 113 and samples an interruption request signal 114 via an AND gate 111. |
