发明名称 COMMUNICATION CONTROL EQUIPMENT
摘要 PURPOSE:To assure the permeability of information and to detect always an error with the same method at the time of bit depending type digital data by adding and transmitting the number of the information bit of '1' and '0' in a transmitting telegram to the head of the telegram, storing the number of the bit at the receiving side and subtracting bit information in the telegram in continuation to it from the above-mentioned number of the bit. CONSTITUTION:To 12 parts and 13 parts of a telegram, the sum of '1' and '0' in respective texts (14 parts) is given as the number of the information bit at a transmitting side. A serialparallel converter 3 first converts the STX of a receiving telegram and gives it to a register 7. At this time, the bit train of the STX is sent even to a discriminateor 2 and thrown away as it is. Next, the 12 parts and the 13 parts are respectively shifted to buffer memories 4 and 5. Next, the 14 parts are sent to a line buffer 9. For the information sent to the discriminator 2, the discrimination of '1' or '0' is executed, and in case of '1', '1' is subtracted from the buffer memory 4 by a subtracter 10. In case of '0', the same operation is executed. By the processing, the condition, in which both memories 4 and 5 come to be zero, is confirmed by a register 6 and the next information is awaited. When the character is a final character ETX, it is shown that receiving is correctly executed. When the character is not the ETX and one side value of the memories 4 and 5 comes to be negative, it is detected as an error at the time point.
申请公布号 JPS62278832(A) 申请公布日期 1987.12.03
申请号 JP19860123076 申请日期 1986.05.27
申请人 NIPPON DENKI FUIIRUDO SERVICE KK 发明人 NAKAMURA KENICHI
分类号 H04L1/00 主分类号 H04L1/00
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