发明名称 TRIGGER CIRCUIT
摘要 PURPOSE:To obtain a stable output, by dividing an output of a D type FF in two to apply one part of the output direct to an AND circuit while the other part thereof is applied to the circuit through a delay circuit. CONSTITUTION:A hold-off signal (a) is applied to a first input terminal 15 while a trigger signal (b) done to a second input terminal 16 and the signals (a) and (b) are applied to a D type FF11. One part of an output signal (c) of the FF11 is applied directly to an AND circuit 13 while the other part thereof is done to the circuit 13 through a delay circuit 12 as signal (d). The circuit 13 operates to produce an output only when the signals (c) and (d) are applied thereto and both go to the H level simultaneously and hence, the circuit 13 will not work by the signal (b) as applied at the time T1. At the time T2, when the signal (b) is applied, the FF11 operates immediately as the signal (a) applied to a terminal 15 is already at the H level and the output of the FF11 shifts to the H level. As the signal (c) is inputted into the circuit 13 directly or through the circuit 12 as signal (d), an output (e) is obtained at an output terminal 17 after a delay time td from the time T2.
申请公布号 JPS62278461(A) 申请公布日期 1987.12.03
申请号 JP19860122462 申请日期 1986.05.28
申请人 IWATSU ELECTRIC CO LTD 发明人 ARAI MINORU
分类号 H03K5/00;G01R13/32;H03K5/1252 主分类号 H03K5/00
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