发明名称 SEMICONDUCTOR MEMORY
摘要 PURPOSE:To erase all contents of a memory at a high speed by holding an erasure data written in a memory cell depending on the active state of a sense amplifier drive signal and activating the word line sequentially. CONSTITUTION:An RAS signal is brought into a low level, an X system address is fetched by a buffer XAB to drive a corresponding a word line W. Then a sense amplifier drive signal is brought into a high/low level and a signal from a memory cell MC is amplified by each sense amplifier SA. Further, an address of the Y system is fetched via a buffer YAB to drive one corresponding Y decoder output line and an erasure data is written in the cell MC. Then the Y decoder output line is driven to write an erasure data in the next cell MC. The operation is repeated and the erasure data is written in all the cells MC. Then the sense amplifier is brought into the OFF state by a sense amplifier drive signal and the word line W is selected sequentially by using an address signal generated in a chip to write sequentially the erased data in the selected cell MC.
申请公布号 JPS62273696(A) 申请公布日期 1987.11.27
申请号 JP19860114640 申请日期 1986.05.21
申请人 HITACHI LTD;HITACHI DEVICE ENG CO LTD 发明人 ETO JUN;SHIMOHIGASHI KATSUHIRO;MIYAZAWA KAZUYUKI;KIMURA KATSUTAKA;AKIBA TAKEZA
分类号 G11C11/401;G11C11/4072;G11C11/4078;G11C11/409 主分类号 G11C11/401
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