发明名称 TESTING EQUIPMENT FOR SEMICONDUCTOR MEMORY
摘要 PURPOSE:To test a memory which has a random and a serial access port by selecting the value of a counter by a multiplexer and supplying it as an address to a buffer memory. CONSTITUTION:An address and data are supplied to the RAM part of a memory 13 to be tested from a pattern generator 11 and the address is also supplied to the buffer memory 31 through the multiplexer 37 simultaneously to attain access while the data is supplied to the memory 31 and written at the same time. Then, data in the RAM part of the memory 13 is transferred to a SAM part, the pointer of the SAM part of the memory 13 is initialized with the address from the generator 11, and the counter 38 is initialized with the address at the same time. This counter 38 accesses the memory 31 to read said memory and read data from the SAM part of the memory 13 and an expected value which is read data from the memory 31 are compared by a logic comparator 15 in synchronization with said read, thereby testing the memory 13.
申请公布号 JPS62272165(A) 申请公布日期 1987.11.26
申请号 JP19870001546 申请日期 1987.01.06
申请人 ADVANTEST CORP 发明人 OSHIMA HIROMI;SHIMIZU MASAO;NISHIURA JUNJI
分类号 G01R31/316;G01R31/28;G11C29/00;G11C29/04;G11C29/56 主分类号 G01R31/316
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