| 摘要 |
PURPOSE:To improve the output characteristic by using a couple of switching means supplying an output signal to a couple of loads in time division so as to supply two input signals alternatively thereby decreasing number of switching means through which the signal outputted to the loads passes. CONSTITUTION:Three input signals v1, v2 and v3 are given respectively to a buffer amplifier comprising a transistor (TR) (Q1, Q2 or Q3) and summed to an emitter of a TR Q4 in a form of current and inputted thereto through a resistor (R10, R11 or R12). Switches Sw1, SW4 act like selecting one of two input signals and act like supplying each input signal in time division and the two input signals are applied to each head respectively only at a desired time through the switches SW1 and SW4.
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