| 摘要 |
PURPOSE:To obtain a high withstand voltage vertical MOSFET having less power loss by providing a source connecting electrode provided at a base region for connecting the source region and a base region at the position isolated from the portion to become a channel and a drain electrode at the portion exposed at the back surface of a carrier implanting region. CONSTITUTION:When a voltage is applied to an MOSFET, a channel region 4a becomes an n type inverting layer, a drain current is flowed, and a voltage higher than a rising voltage is not applied to a p-n junction between a carrier implanted region 11 and drain regions 2, 3. Accordingly, a current is flowed in a passage indicated by a broken line 12. On the other hand, when the drain current flowed in the vicinity of a boundary between the region 11 and he regions 2, 3 becomes the forward rising voltage or higher of the p-n junction occurs, and minority carrier is implanted to the drain region 2 from here. As a result, it becomes the same state that the resistivity decreases upon receiving of the conductivity modulation in the region 2, the increase in the voltage drop between the source and the drain is limited to reduce the power loss in the large current region. |
