| 摘要 |
<p>PURPOSE:To improve the accuracy of measurement at the time of measuring of capacity of a processing program, etc., by fractionalizing unit of timing of a timer mechanism. CONSTITUTION:An interval timer 1 counts given first clock signals CL-1 and generates an interruption signal at every specified time interval. A delay circuit 2 generates the second clock signals CL-2 made by delaying the first clock signals CL-1 by half period. A clock signal generating means 3 generates the third clock signals CL-3 from the first clock signals CL-1 and the second clock signals CL-2. The device is provided with a timer mechanism 4 that is stepped by the third clock signals CL-3. From the first clock signals CL-1 and the second clock signals CL-2 delayed by half period therefrom, the third clock signals CL-3, their 1/2 period, are formed. The first clock signals CL-1 are used for the interval timer 1, and the third clock signals CL-3, timing unit of which is half conventional unit are used for the timer mechanism. Consequently, the accuracy of measurement of capacity of an applied program can be heightened without remaking the operating system.</p> |
